One or more embodiments relate to a nonvolatile memory device and a method of operating the same.
Recently, there has been an increasing demand for nonvolatile memory devices which can be electrically programmed and erased and do not require the refresh function of rewriting data at specific periods.
A nonvolatile memory cell enables electrical program/erase operations and performs the program and erase operations by varying a threshold voltage when electrons are migrated by a strong electric field applied to a thin oxide layer.
The nonvolatile memory device typically includes a memory cell array in which cells for storing data are arranged in matrix form and a page buffer for writing data into specific cells of the memory cell array or reading data stored in specific cells thereof. The page buffer includes bit line pairs connected to specific memory cells, a register for temporarily storing data to be written into the memory cell array or reading the data of specific cells from the memory cell array and temporarily storing the read data, a sensing node for detecting the voltage level of a specific bit line or a specific register, and a bit line select unit for controlling whether to connect the specific bit line to the sensing node.
A nonvolatile memory device including several planes may be configured. Each of the planes includes memory cell blocks and a page buffer unit which is independently driven. A read operation for a nonvolatile memory device having the above multi-plane structure is performed on the planes at the same time. In other words, a read operation is performed on two different planes using the same voltage.
However, a program state may differ at every plane with the introduction of a Multi-Level Cell (MLC) program method. Accordingly, when the read operation is performed on planes at the same time, a problem may arise.